Icarus Verilog

Download Source:	ftp://ftp.geda.seul.org/pub/geda/dist/verilog-20070608.tar.gz

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Introduction to Icarus Verilog

Icarus Verilog is a a GPLed Verilog compiler. Icarus Verilog includes a a parser that parses Verilog (plus extensions) and generates an internal netlist. The netlist is passed to various processing steps that transform the design to more optimal/practical forms, then passed to a code generator for final output. The processing steps and the code generator are selected by command line switches.

Project Homepage: http://www.icarus.com/eda/verilog

Dependencies

Recommended

• gperf

Non-Multilib

Compile the package:

./configure --prefix=/usr &&
make

Install the package

make install

Install the example files:

install -v -m755 -d /usr/share/doc/verilog/examples &&
cp -v examples/* /usr/share/doc/verilog/examples

Multilib

32Bit

Compile the package:

CC="gcc ${BUILD32}" CXX="gcc ${BUILD32}" PKG_CONFIG_PATH=${PKG_CONFIG_PATH32}" \
./configure --prefix=/usr &&
make

Install the package

make install

N32

Compile the package:

CC="gcc ${BUILDN32}" CXX="gcc ${BUILDN32}" PKG_CONFIG_PATH=${PKG_CONFIG_PATHN32}" \
./configure --prefix=/usr --libdir=/usr/lib32 &&
make

Install the package

make install

64Bit

Compile the package:

CC="gcc ${BUILD64}" CXX="gcc ${BUILD64}" PKG_CONFIG_PATH=${PKG_CONFIG_PATH64}" \
./configure --prefix=/usr --libdir=/usr/lib64 &&
make

Install the package

make install

Install the example files:

install -v -m755 -d /usr/share/doc/verilog/examples &&
cp -v examples/* /usr/share/doc/verilog/examples

Contents

Installed Directories:	/usr/lib/ivl
Installed Programs:	iverilog, vvp, iverilog-vpi
Installed Libraries:	libvpi.a, libveriuser.a

Short Descriptions

iverilog:	Compiler that translates Verilog source code into executable programs for simulation, or other netlist formats for further processing.
vvp:	Run time engine that executes the default compiled form generated by Icarus Verilog.
iverilog-vpi:	Tool to simplify the compilation of VPI modules for use with Icarus Verilog.